Patterned CMP Test Wafers

Patterned CMP Test Wafers

PATTERNED CMP TEST WAFERS

Patterned CMP test wafers are used to evaluate slurries, polishing equipment, and polishing conditions in chemical mechanical polishing (CMP).

They are used to compare dishing (recesses in interconnect lines) and erosion (excess removal in dense interconnect areas) across different line widths, spaces, and pattern densities, and to evaluate post-polish planarity, removal rate, and film selectivity.

Philtech supplies patterned wafers made using standard masks: CMP-4 and 754/854 for CMP evaluation of Cu (copper) interconnects, and PT004 for CMP evaluation of oxide fill in STI (shallow trench isolation).

The dimensions shown are design values for the standard masks. Contact us to discuss wafer diameter, film stack, and film thickness to suit your evaluation conditions.

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CMP-4 | Standard Mask for Cu CMP Evaluation

Interconnect patterns with varying line widths and spaces are used to evaluate differences in step height after Cu CMP.

Mask Specifications and Layout

ItemDetails
Mask layout20.8mm × 20.8mm
Minimum line width80nm(0.08µm)
Overall layout of CMP-4, a standard mask for Cu CMP evaluation
CMP-4 overall mask layout

Pattern Dimensions

Line width (µm)Space (µm)
0.080.08, 0.13, 0.18, 0.35
0.090.09, 0.13, 0.35
0.130.13, 0.2, 0.5
0.180.18, 0.28, 0.7
0.250.25, 0.6, 1
0.50.5, 2
11, 4
2.5, 3, 5, 10, 25, 50, 100Same as line width (1:1)

The mask also includes intermediate dimensions not listed in the table, areas with and without dummy patterns and with varying interconnect lengths, and isolated lines with wider spacing from surrounding interconnects.

Example Film Stack

Electroplated Cu
0.6 µm
Si
Cu Seed
60 nm
Ta/TaN
10 nm each
P-SiO/BD
200–300 nm
Example CMP-4 film stack (schematic, not to scale)

PT004 | Standard Mask for STI CMP Evaluation

Areas with varying pattern shapes, widths, spaces, and densities allow comparison of step-height differences after CMP of the STI oxide fill.

Mask Specifications and Layout

ItemDetails
Shot size20mm × 20mm
Minimum dimension0.18µm
Pattern layout of PT004, a standard mask for STI CMP evaluation
PT004 overall mask layout

Pattern Shapes (Schematics)

The blue areas in the plan-view schematics represent the patterns.

Checkerboard

Plan-view schematic of the PT004 checkerboard pattern, with squares arranged in a checkerboard. Corresponds to the example with 1µm width, 1µm space, and 50% density

Square

Plan-view schematic of the PT004 square pattern, with separate squares evenly spaced in rows and columns. Corresponds to the example with 0.5µm width and 0.62µm space

Mesh

Plan-view schematic of the PT004 mesh pattern, with wider grid lines to increase density

Line-and-space

Plan-view schematic of PT004 line-and-space: 1 pattern with equal line widths and spaces

Representative Widths, Spaces, and Densities

PatternWidth / space [µm] (density)
Checkerboard1/1, 10/10, 100/100(all 50%)
Square0.5/0.62(20%), 0.7/0.4(40%), 1/0.3(60%)
Mesh0.2/1.8(19%), 0.2/0.8(36%), 0.2/0.3(64%), 0.5/0.34(84%)
Line-and-space (50% density)0.18/0.18, 1/1, 10/10, 25/25, 100/100, 900/900
Line-and-space (other densities)5/45(10%), 15/35(30%), 35/15(70%), 45/5(90%)

Other width and space combinations are also available. Line-and-space densities range from 10–90% in 10% increments, including densities not listed in the table.

Fabrication Examples | Cross-Sectional SEM Images after Si Etching

These images show the structures before oxide fill. The dimensions shown are examples of actual measurements at the imaged locations.

Example cross-sectional SEM image of PT004 after Si etching, with measured dimensions
Cross-sectional SEM image with measured dimensions
Example cross-sectional SEM image of PT004 after Si etching and before oxide fill
Cross-sectional SEM image

754/854 | Standard Masks for Cu CMP Evaluation

These patterns allow comparison of Cu CMP polishing results across different line widths, spaces, and pattern densities.

Mask Specifications and Layout

ItemDetails
Mask754/854
Trench width0.18–100 µm
Chip layout of 754, a standard mask for Cu CMP evaluation
754 chip layout

Fabrication Example | Full Wafer after Cu Plating

The photograph shows an example of a full wafer, not a cross section after CMP.

Full 754 patterned wafer after Cu plating
754 patterned wafer after Cu plating (fabrication example)

Please let us know your required structure, including the insulating film material and thickness and the Cu plating thickness.