We provide aluminum daisy chain patterns, TSV patterns, etc. used for evaluating packaging materials.
Implementation Evaluation Wafers
Implementation Evaluation Wafers
1. Daisy Chain
Example of cross-sectional structure of daisy chain pattern
It is used to evaluate package filling materials and solder materials.
Please contact us regarding bump pitch and solder material. It is also possible to thin the silicon substrate and make it into chips.
SEM image after bump formation
2. TSV(Through Silicon Via) chip
This is a chip with a TSV (Through Silicon Via) electrode formed through the silicon substrate.
When combined with rewiring patterns, it is possible to electrically connect chips with different electrode pad arrangements.
TSV interposer
Cross-sectional SEM image